NA
| CH3_ENABLE_BLOCK_TFR_DONE_INTSIGNAL | NA |
| CH3_ENABLE_DMA_TFR_DONE_INTSIGNAL | NA |
| CH3_ENABLE_SRC_TRANSCOMP_INTSIGNAL | NA |
| CH3_ENABLE_DST_TRANSCOMP_INTSIGNAL | NA |
| CH3_ENABLE_SRC_DEC_ERR_INTSIGNAL | NA |
| CH3_ENABLE_DST_DEC_ERR_INTSIGNAL | NA |
| CH3_ENABLE_SRC_SLV_ERR_INTSIGNAL | NA |
| CH3_ENABLE_DST_SLV_ERR_INTSIGNAL | NA |
| CH3_ENABLE_LLI_RD_DEC_ERR_INTSIGNAL | NA |
| CH3_ENABLE_LLI_WR_DEC_ERR_INTSIGNAL | NA |
| CH3_ENABLE_LLI_RD_SLV_ERR_INTSIGNAL | NA |
| CH3_ENABLE_LLI_WR_SLV_ERR_INTSIGNAL | NA |
| CH3_ENABLE_SHADOWREG_OR_LLI_INVALID_ERR_INTSIGNAL | NA |
| CH3_ENABLE_SLVIF_MULTIBLKTYPE_ERR_INTSIGNAL | NA |
| CH3_ENABLE_SLVIF_DEC_ERR_INTSIGNAL | NA |
| CH3_ENABLE_SLVIF_WR2RO_ERR_INTSIGNAL | NA |
| CH3_ENABLE_SLVIF_RD2RWO_ERR_INTSIGNAL | NA |
| CH3_ENABLE_SLVIF_WRONCHEN_ERR_INTSIGNAL | NA |
| CH3_ENABLE_SLVIF_SHADOWREG_WRON_VALID_ERR_INTSIGNAL | NA |
| CH3_ENABLE_SLVIF_WRONHOLD_ERR_INTSIGNAL | NA |
| CH3_ENABLE_SLVIF_WRPARITY_ERR_INTSIGNAL | NA |
| CH3_ENABLE_CH_LOCK_CLEARED_INTSIGNAL | NA |
| CH3_ENABLE_CH_SRC_SUSPENDED_INTSIGNAL | NA |
| CH3_ENABLE_CH_SUSPENDED_INTSIGNAL | NA |
| CH3_ENABLE_CH_DISABLED_INTSIGNAL | NA |
| CH3_ENABLE_CH_ABORTED_INTSIGNAL | NA |